While metastability—an indeterminate state in a digital circuit—is far from a new topic, increasingly faster signal rates can put your design at greater disk to the phenomena. Certainly you should ...

Wire delay is beginning to dominate gate delay in current CMOS technologies. According to Moore’s Law by 2016 CMOS feature size should be on the order of 22 nm with clock frequencies reaching around ...

As system-on-chip (SoC) designs grow larger, designers must grapple with serious global timing problems, the effect of wire loading and timing delays and the performance hit associated with supporting ...

Power supplies that use diodes to rectify an ac voltage to obtain a dc voltage must deal with inherent inefficiencies. A standard diode or ultra-fast diode can have a 1-V forward voltage or higher at ...

Given the growing importance and impact of portable, battery-operated devices in today’s society, it’s easy to understand why power consumption has become such a critical factor in IC design. But it’s ...

The advantages offered by a synchronous buck or boost topology can also be applied to a buck-boost topology, where the converter’s output voltage falls within its input range. In this case, a ...

Continuing Linear Technology’s popular series of DesignNotes is Volume 3 of Analog Circuit Design (opening figure) with over 1000 pages (and five pounds) of analog circuits. Edited by Bob Dobkin and ...